How would you use modern RAM and interface logic to replace 8 MB of vintage SRAM? A cheap and simple solution would make a big difference for many retrocomputing and hobby electronics projects. This question arose from a discussion at 68kmla.org, from a project to design an 8 MB RAM expansion card for the 1989 Macintosh Portable, and it piqued my interest. Modern components are so much cheaper and more capable than their 1980’s equivalents, there must be a way.
As you might remember from long-ago engineering classes, standard computer RAM comes in two basic types: static RAM (SRAM) and dynamic RAM (DRAM). SRAM is very convenient and easy to use. The CPU places an address on the SRAM’s address pins, and some short time later the CPU can read the value stored at that address from the SRAM’s data pins. Once stored, values remain in SRAM for as long as the power is kept on. DRAM usage is more complex. The CPU places half of the address bits on the DRAM’s address pins (the row address), then a short time later it removes these and places the other half of the address bits on the DRAM’s address pins (the column address), and only then can it read the value stored at that address. The stored values are not persistent, but will be lost after a few milliseconds unless they are constantly refreshed.
For retro/hobby projects, SRAM is ideal because there’s no memory controller or refresh logic required. The Mac Portable RAM expansion card also uses SRAM, because that’s what the Portable was designed to use – perhaps to save power that would otherwise be lost to refresh cycles while the computer was asleep.
The problem is that in 2015, SRAM is rarely used anymore. The RAM in your new Windows or OSX machine is all some flavor of DRAM. A search of popular online electronics vendors like Digi-Key, Mouser, and Farnell reveals that few SRAM chips are available for sale today, and the ones that are available are low capacity and expensive. For the Mac Portable 8 MB RAM expansion card, the most likely candidate is this 2 MB Alliance Memory SRAM chip – so four chips would be required. But that chip is $10 each! You’d have $40 in RAM costs before even considering the cost of the other components, the PCB, and assembly. $40 for 8 MB of RAM seems crazy, when you can buy 8 GB of modern RAM for about the same price.
Building a Frankenstein RAM
Can some flavor of modern DRAM be used, along with some interface glue logic, to make an 8 MB RAM card that looks like SRAM to the Mac Portable? In theory, I believe it’s possible, but the details look tricky. The SRAM speed is 55 ns, meaning the CPU must wait 55 ns after presenting the address before it can read the value stored there. The proposed SRAM replacement would need a state machine of some kind that could latch the address, break it into separate row and column addresses, present these to the DRAM, and then grab the stored value and provide it to the CPU, and then do a DRAM refresh cycle, all in less than 55 ns. That’s something like 5 operations, so each one would need to take less than 11 ns, implying a 91 MHz clock rate for the state machine. This state machine would also need to handle any necessary DRAM initialization (CAS latency setting?), and things like burst mode and other DRAM details that I’ve heard of but don’t really know what they are. It could be implemented in a CPLD or FPGA. It would likely require a large number of pins, perhaps 60 or more, for the address and data busses on both sides. That probably rules out most CPLDs, and requires a higher pin count FPGA.
Here’s one candidate chip: an 8 MB Alliance Memory SDRAM that’s just $1.53. The price is certainly right. It looks like it would be fast enough, given my quick peek at the data sheet. But the complexity of building that FPGA memory controller interface is a bit daunting.
How about using some kind of modern synchronous SRAM, instead of DRAM? I’ve never really looked at synchronous SRAM, though I assume from its name it’s like standard SRAM with the addition of a clock for the control signals. But a quick glance at Digi-Key shows that it’s no cheaper than old-school SRAM.
What about using Flash RAM? That’s probably no good – it’s not designed to be constantly modified like a general purpose RAM, and would likely fail after some tens or hundreds of thousands of update cycles. And I’m not certain it would be fast enough, either. Flash is normally a page-centric memory, so in order to modify one memory location, an entire page must be erased and re-written. But it sure is cheap!
Maybe a fast microcontroller could be used instead of an FPGA to implement the memory controller interface. Some of the newer ARM microcontrollers have a built-in DRAM controller, and can run at 100s of MHz. Would it be crazy to consider writing a 10 line program that sits in a tight loop, watching the CPU address and data bus on one set of pins, and fetching/storing data to DRAM on another set of pins?
Other bright ideas?